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Searched refs:BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	`1704 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x00000001`
dce_8_0_sh_mask.h	`158 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x1`
dce_10_0_sh_mask.h	`158 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x1 [all...]`
dce_11_0_sh_mask.h	`226 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x1 [all...]`
dce_11_2_sh_mask.h	`266 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x1 [all...]`
dce_12_0_sh_mask.h	`5195 #define BL1_PWM_BL_UPDATE_SAMPLE_RATE__BL1_PWM_BL_UPDATE_RESET_SAMPLE_RATE_FRAME_COUNTER__SHIFT 0x1 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_2_0_0_sh_mask.h	`[all...]`
dcn_2_1_0_sh_mask.h	`[all...]`

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