| /src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| RegisterBankEmitter.cpp | 1 //===- RegisterBankEmitter.cpp - Generate a Register Bank Desc. -*- C++ -*-===//
10 // register bank for a code generator.
24 #define DEBUG_TYPE "register-bank-emitter"
31 /// A vector of register classes that are included in the register bank.
37 /// The register classes that are covered by the register bank.
47 /// Get the human-readable name for the bank.
72 /// Add a register class to the bank without duplicates.
135 for (const auto &Bank : Banks)
136 OS << " " << Bank.getEnumeratorName() << " = " << ID++ << ",\n";
154 /// Visit each register class belonging to the given register bank
[all...] |
| RegisterInfoEmitter.cpp | 67 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
70 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
74 CodeGenRegBank &Bank);
78 CodeGenRegBank &Bank);
103 CodeGenTarget &Target, CodeGenRegBank &Bank) {
104 const auto &Registers = Bank.getRegisters();
135 const auto &RegisterClasses = Bank.getRegClasses();
170 auto &SubRegIndices = Bank.getSubRegIndices();
189 unsigned NumSets = Bank.getNumRegPressureSets();
191 const RegUnitSet &RegUnits = Bank.getRegSetAt(i)
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsRegisterBankInfo.cpp | 325 // Determine InstType from register bank of phys register that is
373 const RegisterBank *Bank =
376 if (Bank == &Mips::FPRBRegBank)
378 else if (Bank == &Mips::GPRBRegBank)
381 llvm_unreachable("Unsupported register bank.\n");
542 // Use default handling for PHI, i.e. set reg bank of def operand to match
551 const RegisterBankInfo::ValueMapping *Bank = getFprbMapping(Op0Size);
553 {Bank, &Mips::ValueMappings[Mips::GPRIdx], Bank, Bank});
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| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPURegisterBankInfo.cpp | 14 /// AMDGPU has unique register bank constraints that require special high level
16 /// VGPR (vector), and SGPR (scalar). Additionally the VCC register bank is a
17 /// sort of pseudo-register bank needed to represent SGPRs used in a vector
18 /// boolean context. There is also the AGPR bank, which is a special purpose
19 /// physical register bank present on some subtargets.
32 /// register. These are represented with the VCC bank. During selection, we need
34 /// bank. To distinguish whether an SGPR should use the SGPR or VCC register
35 /// bank, we need to know the use context type. An SGPR s1 value always means a
36 /// VCC bank value, otherwise it will be the SGPR bank. A scalar compare set
[all...] |
| SIRegisterInfo.h | 264 const RegisterBank &Bank,
269 const RegisterBank &Bank,
271 return getRegClassForSizeOnBank(Ty.getSizeInBits(), Bank, MRI);
|
| /src/external/gpl3/gdb/dist/sim/arm/ |
| armsupp.c | 139 including updating the register bank, given a MSR instruction. */
167 ARMword bank = ModeToBank (mode & MODEBITS); local
169 if (! BANK_CAN_ACCESS_SPSR (bank))
172 return state->Spsr[bank];
180 ARMword bank = ModeToBank (mode & MODEBITS); local
182 if (BANK_CAN_ACCESS_SPSR (bank))
183 state->Spsr[bank] = value;
191 if (BANK_CAN_ACCESS_SPSR (state->Bank))
194 SETPSR_C (state->Spsr[state->Bank], rhs);
196 SETPSR_X (state->Spsr[state->Bank], rhs)
[all...] |
| armemu.c | 2291 state->Cpsr = GETSPSR (state->Bank);
2461 state->Cpsr = GETSPSR (state->Bank);
2573 DEST = GETSPSR (state->Bank);
2596 state->Cpsr = GETSPSR (state->Bank);
2735 state->Cpsr = GETSPSR (state->Bank);
3091 state->Cpsr = GETSPSR (state->Bank);
3125 state->Cpsr = GETSPSR (state->Bank);
3157 state->Cpsr = GETSPSR (state->Bank);
3203 state->Cpsr = GETSPSR (state->Bank);
5061 if (state->Bank > 0
[all...] |
| arminit.c | 203 state->Bank = SVCBANK;
275 * mode, register bank, and the saving of registers. Call with the *
|
| armdefs.h | 90 ARMword Bank; /* the current register bank */
218 * Mode and Bank Constants *
249 #define BANK_CAN_ACCESS_SPSR(bank) \
250 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
|
| /src/external/gpl3/gdb.old/dist/sim/arm/ |
| armsupp.c | 139 including updating the register bank, given a MSR instruction. */
167 ARMword bank = ModeToBank (mode & MODEBITS); local
169 if (! BANK_CAN_ACCESS_SPSR (bank))
172 return state->Spsr[bank];
180 ARMword bank = ModeToBank (mode & MODEBITS); local
182 if (BANK_CAN_ACCESS_SPSR (bank))
183 state->Spsr[bank] = value;
191 if (BANK_CAN_ACCESS_SPSR (state->Bank))
194 SETPSR_C (state->Spsr[state->Bank], rhs);
196 SETPSR_X (state->Spsr[state->Bank], rhs)
[all...] |
| armemu.c | 2291 state->Cpsr = GETSPSR (state->Bank);
2461 state->Cpsr = GETSPSR (state->Bank);
2573 DEST = GETSPSR (state->Bank);
2596 state->Cpsr = GETSPSR (state->Bank);
2735 state->Cpsr = GETSPSR (state->Bank);
3091 state->Cpsr = GETSPSR (state->Bank);
3125 state->Cpsr = GETSPSR (state->Bank);
3157 state->Cpsr = GETSPSR (state->Bank);
3203 state->Cpsr = GETSPSR (state->Bank);
5061 if (state->Bank > 0
[all...] |
| arminit.c | 203 state->Bank = SVCBANK;
275 * mode, register bank, and the saving of registers. Call with the *
|
| armdefs.h | 90 ARMword Bank; /* the current register bank */
218 * Mode and Bank Constants *
249 #define BANK_CAN_ACCESS_SPSR(bank) \
250 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
|
| /src/sys/dev/acpi/ |
| apei_cper.h | 128 uint16_t Bank;
181 "b\006" "BANK\0" \
199 enum { /* struct cper_memory_error::Bank */
|
| apei.c | 441 device_printf(sc->sc_dev, "%s: Bank=0x%"PRIx16"\n", ctx,
442 ME->Bank);
|
| /src/sys/external/isc/atheros_hal/dist/ar5212/ |
| ar2316.c | 169 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\
200 /* Bank 1 Write */
203 /* Bank 2 Write */
206 /* Bank 3 Write */
209 /* Bank 6 Write */
215 /* Bank 7 Setup */
233 * Return a reference to the requested RF Bank.
236 ar2316GetRfBank(struct ath_hal *ah, int bank)
241 switch (bank) {
248 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n"
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| ar2317.c | 147 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2317[i][_col];\
178 /* Bank 1 Write */
181 /* Bank 2 Write */
184 /* Bank 3 Write */
187 /* Bank 6 Write */
193 /* Bank 7 Setup */
210 * Return a reference to the requested RF Bank.
213 ar2317GetRfBank(struct ath_hal *ah, int bank)
218 switch (bank) {
225 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n"
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| ar2413.c | 163 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2413[i][_col];\
194 /* Bank 1 Write */
197 /* Bank 2 Write */
200 /* Bank 3 Write */
203 /* Bank 6 Write */
209 /* Bank 7 Setup */
227 * Return a reference to the requested RF Bank.
230 ar2413GetRfBank(struct ath_hal *ah, int bank)
235 switch (bank) {
242 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n"
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| ar2425.c | 157 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
188 /* Bank 1 Write */
191 /* Bank 2 Write */
194 /* Bank 3 Write */
197 /* Bank 6 Write */
203 /* Bank 7 Setup */
228 * Return a reference to the requested RF Bank.
231 ar2425GetRfBank(struct ath_hal *ah, int bank)
236 switch (bank) {
243 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n"
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| ar5112.c | 151 * Return a reference to the requested RF Bank.
154 ar5112GetRfBank(struct ath_hal *ah, int bank)
159 switch (bank) {
166 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
167 __func__, bank);
184 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5112[i][_col];\
238 /* Setup Bank 1 Write */
241 /* Setup Bank 2 Write */
244 /* Setup Bank 3 Write */
247 /* Setup Bank 6 Write *
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| ar5413.c | 162 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\
212 /* Bank 1 Write */
215 /* Bank 2 Write */
218 /* Bank 3 Write */
221 /* Bank 6 Write */
244 /* Bank 7 Setup */
262 * Return a reference to the requested RF Bank.
265 ar5413GetRfBank(struct ath_hal *ah, int bank)
270 switch (bank) {
277 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n"
[all...] |
| /src/sys/arch/luna68k/dev/xplx/ |
| xplx.asm | 665 ; Bank : VA=E000H -> PA=28000H PR
|
