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    Searched refs:BaseOp2 (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp 2794 const MachineOperand &BaseOp2 = *BaseOps2.front();
2805 if ((BaseOp1.isReg() != BaseOp2.isReg()) ||
2806 (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) ||
2807 (BaseOp1.isFI() && BaseOp1.getIndex() != BaseOp2.getIndex()))
2813 const MachineInstr &SecondLdSt = *BaseOp2.getParent();
2835 assert(Base1 == &BaseOp1 && Base2 == &BaseOp2 &&
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachinePipeliner.cpp 774 const MachineOperand *BaseOp1, *BaseOp2;
779 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2,
781 if (BaseOp1->isIdenticalTo(*BaseOp2) &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64InstrInfo.cpp 3093 const MachineOperand &BaseOp2 = *BaseOps2.front();
3095 const MachineInstr &SecondLdSt = *BaseOp2.getParent();
3096 if (BaseOp1.getType() != BaseOp2.getType())
3103 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg())
3141 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) &&
3147 BaseOp2.getIndex(), Offset2, SecondOpc);

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