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    Searched refs:BaseOps (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIInsertHardClauses.cpp 118 SmallVector<const MachineOperand *, 4> BaseOps;
159 SmallVector<const MachineOperand *, 4> BaseOps;
161 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2,
177 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) {
188 CI.BaseOps = std::move(BaseOps);
192 CI = ClauseInfo{Type, &MI, &MI, 1, std::move(BaseOps)};
SIInstrInfo.cpp 245 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
266 BaseOps.push_back(BaseOp);
302 BaseOps.push_back(BaseOp);
322 BaseOps.push_back(RSrc);
325 BaseOps.push_back(BaseOp);
333 BaseOps.push_back(SOffset);
347 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx));
352 BaseOps.push_back(&LdSt.getOperand(I));
354 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr));
367 BaseOps.push_back(BaseOp)
    [all...]
SIInstrInfo.h 190 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiInstrInfo.h 72 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
LanaiInstrInfo.cpp 799 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
818 BaseOps.push_back(BaseOp);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachineScheduler.cpp 1491 SmallVector<const MachineOperand *, 4> BaseOps;
1495 MemOpInfo(SUnit *SU, ArrayRef<const MachineOperand *> BaseOps,
1497 : SU(SU), BaseOps(BaseOps.begin(), BaseOps.end()), Offset(Offset),
1522 if (std::lexicographical_compare(BaseOps.begin(), BaseOps.end(),
1523 RHS.BaseOps.begin(), RHS.BaseOps.end(),
1526 if (std::lexicographical_compare(RHS.BaseOps.begin(), RHS.BaseOps.end()
    [all...]
TargetInstrInfo.cpp 1074 SmallVector<const MachineOperand *, 4> BaseOps;
1076 if (!getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, OffsetIsScalable,
1078 BaseOps.size() != 1)
1080 BaseOp = BaseOps.front();
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64InstrInfo.h 128 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
AArch64InstrInfo.cpp 2514 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
2524 BaseOps.push_back(BaseOp);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonInstrInfo.h 209 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
HexagonInstrInfo.cpp 2974 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
2981 BaseOps.push_back(BaseOp);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86InstrInfo.h 333 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
X86InstrInfo.cpp 3736 const MachineInstr &MemOp, SmallVectorImpl<const MachineOperand *> &BaseOps,
3775 BaseOps.push_back(BaseOp);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCInstrInfo.h 541 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
PPCInstrInfo.cpp 2737 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,
2744 BaseOps.push_back(BaseOp);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetInstrInfo.h 1332 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.cpp 3254 SmallVector<SDValue, 1> BaseOps(1, Cond);
3345 BaseOps.clear();
3351 BaseOps.clear();
3367 SmallVector<SDValue, 3> Ops(BaseOps.begin(), BaseOps.end());

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