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    Searched refs:BaseRegOp (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp 765 const MachineOperand &BaseRegOp =
789 .add(BaseRegOp)
938 const MachineOperand &BaseRegOp =
1016 MIB.addReg(BaseRegOp.getReg(), RegState::Define);
1020 .add(BaseRegOp)
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 3685 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1);
3686 assert(BaseRegOp.isReg() && "expected register operand kind");
3692 unsigned BaseReg = BaseRegOp.getReg();
3812 const MCOperand &BaseRegOp = Inst.getOperand(StartOp + 1);
3813 assert(BaseRegOp.isReg() && "expected register operand kind");
3819 unsigned BaseReg = BaseRegOp.getReg();

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