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    Searched refs:BreakDown (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
RegisterBankInfo.h 96 /// mapping (i.e., PartialMapping **BreakDown) and duplicate the
147 const PartialMapping *BreakDown;
157 /// \p BreakDown needs to have a life time at least as long
159 ValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns)
160 : BreakDown(BreakDown), NumBreakDowns(NumBreakDowns) {}
163 const PartialMapping *begin() const { return BreakDown; }
164 const PartialMapping *end() const { return BreakDown + NumBreakDowns; }
171 bool isValid() const { return BreakDown && NumBreakDowns; }
340 /// The number of registers is determined by the number of breakdown for th
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPURegisterBankInfo.cpp 253 // Check if this is a breakdown for G_LOAD to move the pointer from SGPR to
256 if (ValMapping.NumBreakDowns >= 2 || ValMapping.BreakDown[0].Length >= 64)
260 ValMapping.BreakDown[0].Length == 32 &&
261 ValMapping.BreakDown[0].StartIdx == 0 &&
262 ValMapping.BreakDown[1].Length == 32 &&
263 ValMapping.BreakDown[1].StartIdx == 32 &&
264 ValMapping.BreakDown[0].RegBank == ValMapping.BreakDown[1].RegBank);
1148 OpdMapper.getInstrMapping().getOperandMapping(0).BreakDown[0].RegBank;
1425 OpdMapper.getInstrMapping().getOperandMapping(1).BreakDown[0].RegBank
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
RegisterBankInfo.cpp 303 hashValueMapping(const RegisterBankInfo::PartialMapping *BreakDown,
306 return hash_value(*BreakDown);
309 Hashes.push_back(hash_value(BreakDown[Idx]));
314 RegisterBankInfo::getValueMapping(const PartialMapping *BreakDown,
318 hash_code Hash = hashValueMapping(BreakDown, NumBreakDowns);
326 ValMapping = std::make_unique<ValueMapping>(BreakDown, NumBreakDowns);
585 OS << "#BreakDown: " << NumBreakDowns << " ";
RegBankSelect.cpp 122 const RegisterBank *DesiredRegBank = ValMapping.BreakDown[0].RegBank;
140 "need new vreg for each breakdown");
182 (ValMapping.BreakDown[0].Length * ValMapping.NumBreakDowns ==
184 (ValMapping.BreakDown[0].Length % RegTy.getScalarSizeInBits() ==
186 "don't understand this value breakdown");
263 const RegisterBank *DesiredRegBank = ValMapping.BreakDown[0].RegBank;
604 MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMRegisterBankInfo.cpp 93 RegisterBankInfo::PartialMapping *BreakDown) {
94 return VM.NumBreakDowns == 1 && VM.BreakDown == BreakDown;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64RegisterBankInfo.cpp 163 assert(Map[0].BreakDown == \
167 assert(Map[1].BreakDown == \
191 assert(Map[0].BreakDown == \
195 assert(Map[1].BreakDown == \

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