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    Searched refs:CACHELINE_BYTES (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_ring_types.h 22 #define CACHELINE_BYTES 64
23 #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
intel_ring.h 109 #define cacheline(a) round_down(a, CACHELINE_BYTES)
138 return (head - tail - CACHELINE_BYTES) & (size - 1);
intel_ring.c 162 ring->effective_size -= 2 * CACHELINE_BYTES;
308 num_dwords = (rq->ring->emit & (CACHELINE_BYTES - 1)) / sizeof(u32);
322 GEM_BUG_ON(rq->ring->emit & (CACHELINE_BYTES - 1));
intel_timeline.c 61 BUILD_BUG_ON(BITS_PER_TYPE(u64) * CACHELINE_BYTES > PAGE_SIZE);
238 timeline->hwsp_offset = cacheline * CACHELINE_BYTES;
250 memset(vaddr + timeline->hwsp_offset, 0, CACHELINE_BYTES);
475 tl->hwsp_offset = cacheline * CACHELINE_BYTES;
477 memset(vaddr + tl->hwsp_offset, 0, CACHELINE_BYTES);
538 ptr_unmask_bits(cl->vaddr, CACHELINE_BITS) * CACHELINE_BYTES;
intel_engine.h 31 #define CACHELINE_BYTES 64
32 #define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(u32))
selftest_timeline.c 38 return (address + tl->hwsp_offset) / CACHELINE_BYTES;
41 #define CACHELINES_PER_PAGE (PAGE_SIZE / CACHELINE_BYTES)
intel_lrc.c 3172 while ((unsigned long)batch % CACHELINE_BYTES)
3269 while ((unsigned long)batch % CACHELINE_BYTES)
3303 while ((unsigned long)batch % CACHELINE_BYTES)
3398 CACHELINE_BYTES))) {
4529 (wa_ctx->indirect_ctx.size / CACHELINE_BYTES);
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dsb.c 325 tail = ALIGN(dsb->free_pos * 4, CACHELINE_BYTES);
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
scheduler.c 555 0, CACHELINE_BYTES, 0);
567 memset(per_ctx_va, 0, CACHELINE_BYTES);
1546 CACHELINE_BYTES;
1565 CACHELINE_BYTES)) {
cmd_parser.c 2829 ring_size = round_up(wa_ctx->indirect_ctx.size + CACHELINE_BYTES,
2949 roundup(ctx_size + CACHELINE_BYTES,
3004 memcpy(bb_start_sva, per_ctx_start, CACHELINE_BYTES);

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