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Searched refs:CAR_PLLE_AUX_REG (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra210_car.c	618 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML0_OEN), 620 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML1_OEN), 1011 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_REF_SEL_PLLREFE); 1012 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_REF_SRC); 1044 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_SS_SWCTL); 1045 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, 0, CAR_PLLE_AUX_ENABLE_SWCTL); 1046 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_SS_SEQ_INCLUDE, 0); 1047 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_USE_LOCKDET, 0); 1049 tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG, CAR_PLLE_AUX_SEQ_ENABLE, 0);
tegra124_carreg.h	`496 #define CAR_PLLE_AUX_REG 0x48c`
tegra210_carreg.h	`534 #define CAR_PLLE_AUX_REG 0x48c`
tegra124_car.c	`629 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML0_OEN), 631 CAR_PLLE_AUX_REG, CAR_PLLE_AUX_CML1_OEN),`

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