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    Searched refs:CDMAC_INTR_MIE (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/arch/evbppc/virtex/dev/
cdmacreg.h 89 #define CDMAC_INTR_MIE 0x80000000 /* Master interrupt enable */
  /src/sys/arch/evbppc/virtex/
design_gsrd1.c 362 bus_space_write_4(&cdmac_bst, 0, CDMAC_INTR, ~CDMAC_INTR_MIE);
363 bus_space_write_4(&cdmac_bst, 0, CDMAC_INTR, CDMAC_INTR_MIE);
design_gsrd2.c 418 bus_space_write_4(&cdmac_bst, 0, CDMAC_INTR, ~CDMAC_INTR_MIE);
419 bus_space_write_4(&cdmac_bst, 0, CDMAC_INTR, CDMAC_INTR_MIE);

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