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    Searched refs:CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_sh_mask.h 3567 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000
smu_7_1_1_sh_mask.h 4185 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000
smu_7_0_1_sh_mask.h 5007 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000
smu_7_1_0_sh_mask.h 5197 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000
smu_7_1_2_sh_mask.h 5307 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000
smu_7_1_3_sh_mask.h 5211 #define CG_DISPLAY_GAP_CNTL__VBI_TIMER_DISABLE_MASK 0x10000000

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