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  /src/sys/arch/mips/cavium/dev/
octeon_ciureg.h 96 #define CIU_BASE UINT64_C(0x0001070000000000)
  /src/sys/arch/mips/mips/
locore_octeon.S 181 li k1, ((MIPS_XKPHYS_START|CIU_BASE) >> 32) # CIU base (MSW)

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