| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/ |
| ddc_regs.h | 153 DDC_REG_LIST(CLK,id)\
163 DDC_VGA_REG_LIST(CLK)\
182 DDC_REG_LIST_DCN2(CLK, id)\
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| ste-dbx5x0-pinctrl.dtsi | 267 pins = "GPIO23_AA4"; /* CLK */
300 pins = "GPIO23_AA4"; /* CLK */
315 pins = "GPIO23_AA4"; /* CLK */
341 pins = "GPIO23_AA4"; /* CLK */
355 pins = "GPIO208_AH16"; /* CLK */
375 pins = "GPIO208_AH16"; /* CLK */
396 pins = "GPIO208_AH16"; /* CLK */
412 pins = "GPIO208_AH16"; /* CLK */
435 pins = "GPIO128_A5"; /* CLK */
459 pins = "GPIO128_A5"; /* CLK */
[all...] |
| ste-href-family-pinctrl.dtsi | 29 "GPIO217_AH12"; /* CLK */
49 pins = "GPIO217_AH12"; /* CLK */
66 pins = "GPIO217_AH12"; /* CLK */
|
| stm32f7-pinctrl.dtsi | 232 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1 CLK */
245 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1 CLK */
263 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
276 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
|
| sun8i-h2-plus-bananapi-m2-zero.dts | 233 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
240 "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
|
| aspeed-bmc-opp-nicole.dts | 190 /* CLK GEN SI5338 */
|
| at91-kizbox3_common.dtsi | 212 <PIN_PD13__FLEXCOM4_IO1>; //CLK
|
| aspeed-bmc-opp-mihawk.dts | 556 * CLK Buffer 9FGS9092
557 * CLK Buffer 9DBL0651BKILFT
558 * CLK Buffer 9DBL0651BKILFT
|
| aspeed-bmc-opp-mowgli.dts | 430 * CLK Buffer 9FGS9092
|
| da850-lego-ev3.dts | 239 /* SIMO, CLK */
|
| da850.dtsi | 274 /* SIMO, SOMI, CLK */
292 /* SIMO, SOMI, CLK */
500 clock-names = "int-clk";
|
| qcom-apq8060-dragonboard.dts | 95 clk {
96 pins = "gpio167"; /* SDC1 CLK */
119 clk {
143 clk {
144 pins = "gpio97"; /* SDC5 CLK */
|
| ste-snowball.dts | 544 "GPIO143_D12"; /* CLK */
|
| am43x-epos-evm.dts | 441 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
767 gpmc,sync-clk-ps = <0>;
783 gpmc,clk-activation-ns = <0>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/ |
| meson-gxl-s905x-khadas-vim.dts | 184 "eMMC Clk", "eMMC Reset", "eMMC CMD",
187 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
196 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
199 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
|
| meson-gxbb-nanopi-k2.dts | 248 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
250 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
258 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
263 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
282 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
285 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
312 pinctrl-names = "default", "clk-gate";
342 pinctrl-names = "default", "clk-gate";
364 pinctrl-names = "default", "clk-gate";
|
| meson-gxbb-odroidc2.dts | 306 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
308 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
315 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
319 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
359 pinctrl-names = "default", "clk-gate";
381 pinctrl-names = "default", "clk-gate";
|
| meson-gxl-s905x-libretech-cc.dts | 271 "eMMC Clk", "eMMC Reset", "eMMC CMD",
274 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
307 pinctrl-names = "default", "clk-gate";
325 pinctrl-names = "default", "clk-gate";
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
| amdgpu_hw_factory_dcn20.c | 133 DDC_GPIO_VGA_REG_LIST(CLK),
|
| /src/sys/arch/cobalt/stand/boot/ |
| tlp.c | 387 #define CLK (1U << 1) /* clk bit */
413 CSR_WRITE(l, TLP_APROM, bit | CLK);
421 CSR_WRITE(l, TLP_APROM, val | CLK);
|
| /src/sys/arch/hpcmips/tx/ |
| tx39clock.c | 60 dbg_bitmask_print(r, TX39_CLOCK_EN ## m ## CLK, #m)
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/ |
| armada-8040-clearfog-gt-8k.dts | 432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
436 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
|
| /src/sys/arch/sandpoint/stand/altboot/ |
| tlp.c | 280 #define CLK (1U << 1) /* clk bit */
|
| wm.c | 300 #define CLK (1U << 1) /* clk bit */
|
| /src/sys/dev/ic/ |
| ninjascsi32.c | 212 # define ACKW(n) NJSC32_ACK_WIDTH_ ## n ## CLK
213 # define SMPL(n) (NJSC32_SREQ_SAMPLING_ ## n ## CLK | \
216 # define ACKW(n) NJSC32_ACK_WIDTH_/**/n/**/CLK
217 # define SMPL(n) (NJSC32_SREQ_SAMPLING_/**/n/**/CLK | \
609 panic("njsc32_attach: unknown clk %d", sc->sc_clk);
626 aprint_normal(", G/A rev %#x, clk %s%s\n",
|
