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Searched refs:CLK0_CLK8_DS_CNTL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/
rv1_clk_mgr_clk.c	`68 regs->CLK0_CLK8_DS_CNTL = REG_READ(CLK0_CLK8_DS_CNTL) / 10; //dcf deep sleep divider`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
clk_mgr.h	`100 uint32_t CLK0_CLK8_DS_CNTL; //dcf_deep_sleep_divider 128 uint32_t CLK0_CLK8_DS_CNTL; //dcf_deep_sleep_divider`

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