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Searched refs:CLK_PERI_UART1_SEL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8135-clk.h	`183 #define CLK_PERI_UART1_SEL 43`
mt8173-clk.h	`232 #define CLK_PERI_UART1_SEL 37`
mt2701-clk.h	`271 #define CLK_PERI_UART1_SEL 46`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
mt8135.dtsi	`236 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;`
mt2701.dtsi	`270 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;`
mt7623.dtsi	`392 clocks = <&pericfg CLK_PERI_UART1_SEL>,`
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi	`690 clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;`

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