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    Searched refs:CLK_RST_CONTROLLER_PLLU_HW_PWRDN_CFG0_SEQ_ENABLE (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra210_carreg.h	626 #define CLK_RST_CONTROLLER_PLLU_HW_PWRDN_CFG0_SEQ_ENABLE __BIT(24)
tegra210_car.c	982 CLK_RST_CONTROLLER_PLLU_HW_PWRDN_CFG0_SEQ_ENABLE, 0);

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