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Searched refs:CLK_SCLK_MPLL (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
exynos4.h	`23 #define CLK_SCLK_MPLL 9`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
exynos4210-trats.dts	`215 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 223 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 231 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 239 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;`
exynos4210-universal_c210.dts	`230 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 238 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 246 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 254 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;`
exynos4210-i9100.dts	`312 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 321 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 329 assigned-clock-parents = <&clock CLK_SCLK_MPLL>; 338 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;`

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