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    Searched refs:CLK_TOP_APLL2_DIV0 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8173-clk.h	139 #define CLK_TOP_APLL2_DIV0 127
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt8173.dtsi	866 <&topckgen CLK_TOP_APLL2_DIV0>,

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