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    Searched refs:CLK_TOP_AUD1PLL_98M (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt2701-clk.h	76 #define CLK_TOP_AUD1PLL_98M 64
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
mt2701.dtsi	509 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
mt7623.dtsi	677 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,

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