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Searched refs:CLK_TOP_MSDC30_0_SEL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
mt8135-clk.h	`99 #define CLK_TOP_MSDC30_0_SEL 86`
mt7629-clk.h	`97 #define CLK_TOP_MSDC30_0_SEL 85`
mt7622-clk.h	`82 #define CLK_TOP_MSDC30_0_SEL 68`
mt2701-clk.h	`97 #define CLK_TOP_MSDC30_0_SEL 84`
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
mt7622-bananapi-bpi-r64.dts	`222 assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;`
mt7622-rfb1.dts	`199 assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;`
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
mt7623.dtsi	`689 <&topckgen CLK_TOP_MSDC30_0_SEL>;`

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