HomeSort by: relevance | last modified time | path
    Searched refs:CLK_UART1_INTERNAL_DIV (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
pistachio-clk.h 70 #define CLK_UART1_INTERNAL_DIV 78
  /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/img/
pistachio.dtsi 274 assigned-clocks = <&clk_core CLK_UART1_INTERNAL_DIV>,

Completed in 35 milliseconds