Searched refs:CLK_VDO1_MERGE0_DL_ASYNC (Results 1 - 3 of 3) sorted by relevance

/src/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h689 #define CLK_VDO1_MERGE0_DL_ASYNC 24 macro
H A Dmt8195-clk.h839 #define CLK_VDO1_MERGE0_DL_ASYNC 25 macro
/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi3456 <&vdosys1 CLK_VDO1_MERGE0_DL_ASYNC>;

Completed in 11 milliseconds