HomeSort by: relevance | last modified time | path
    Searched refs:CMPrr (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMInstructionSelector.cpp 110 unsigned CMPrr;
322 STORE_OPCODE(CMPrr, CMPrr);
1036 CmpConstants Helper(Opcodes.CMPrr, ARM::INSTRUCTION_LIST_END,
ARMExpandPseudoInsts.cpp 1635 unsigned CMPrr = IsThumb ? ARM::tCMPhir : ARM::CMPrr;
1636 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
1750 unsigned CMPrr = IsThumb ? ARM::tCMPhir : ARM::CMPrr;
1751 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
1756 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
ARMBaseInstrInfo.cpp 2785 case ARM::CMPrr:
2839 /// CMPrr can be made redundant by SUBrr if the operands are the same.
2841 /// CMPrr(r0, r1) can be made redundant by ADDr[ri](r0, r1, X).
2847 if ((CmpI->getOpcode() == ARM::CMPrr || CmpI->getOpcode() == ARM::t2CMPrr) &&
2882 if ((CmpI->getOpcode() == ARM::CMPrr || CmpI->getOpcode() == ARM::t2CMPrr) &&
2976 /// E.g. SUBrr(r1,r2) and CMPrr(r1,r2). We also handle the case where two
2977 /// operands are swapped: SUBrr(r1,r2) and CMPrr(r2,r1), by updating the
3015 // For CMPrr(r1,r2), we are looking for SUB(r1,r2), SUB(r2,r1), or
3020 // MI is not a candidate for CMPrr.
ARMFrameLowering.cpp 2591 Opcode = Thumb ? ARM::tCMPr : ARM::CMPrr;
ARMFastISel.cpp 1402 CmpOpc = ARM::CMPrr;
ARMISelLowering.cpp 10450 BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
10469 BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
11505 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
11509 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))

Completed in 74 milliseconds