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Searched refs:CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_sh_mask.h	`2978 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_8_0_sh_mask.h	`1954 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_7_1_1_sh_mask.h	`3628 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_7_0_1_sh_mask.h	`4418 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_7_1_0_sh_mask.h	`4608 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_7_1_2_sh_mask.h	`4750 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`
smu_7_1_3_sh_mask.h	`4654 #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3`

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