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Searched refs:CNB_PWRMGT_CNTL__SPARE__SHIFT (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_sh_mask.h	`2982 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_8_0_sh_mask.h	`1958 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_7_1_1_sh_mask.h	`3632 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_7_0_1_sh_mask.h	`4422 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_7_1_0_sh_mask.h	`4612 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_7_1_2_sh_mask.h	`4754 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`
smu_7_1_3_sh_mask.h	`4658 #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5`

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