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    Searched refs:CNL_PORT_CL1CM_DW5 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_combo_phy.c 149 ret &= check_phy_reg(dev_priv, phy, CNL_PORT_CL1CM_DW5,
170 val = I915_READ(CNL_PORT_CL1CM_DW5);
172 I915_WRITE(CNL_PORT_CL1CM_DW5, val);
intel_ddi.c 2549 val = I915_READ(CNL_PORT_CL1CM_DW5);
2551 I915_WRITE(CNL_PORT_CL1CM_DW5, val);
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 1882 #define CNL_PORT_CL1CM_DW5 _MMIO(0x162014)

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