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    Searched refs:CNVC_SURFACE_PIXEL_FORMAT (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_ipp.h 38 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
78 IPP_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
128 type CNVC_SURFACE_PIXEL_FORMAT; \
166 uint32_t CNVC_SURFACE_PIXEL_FORMAT;
amdgpu_dcn10_dpp.c 398 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0,
399 CNVC_SURFACE_PIXEL_FORMAT, pixel_format);
dcn10_dpp.h 120 SRI(CNVC_SURFACE_PIXEL_FORMAT, CNVC_CFG, id), \
324 TF_SF(CNVC_CFG0_CNVC_SURFACE_PIXEL_FORMAT, CNVC_SURFACE_PIXEL_FORMAT, mask_sh), \
1067 type CNVC_SURFACE_PIXEL_FORMAT; \
1333 uint32_t CNVC_SURFACE_PIXEL_FORMAT; \
amdgpu_dcn10_dpp_cm.c 715 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0,
716 CNVC_SURFACE_PIXEL_FORMAT, 0x8);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dpp.c 222 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0,
223 CNVC_SURFACE_PIXEL_FORMAT, pixel_format);

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