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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dwb.c 182 REG_GET(CNV_UPDATE, CNV_UPDATE_LOCK, &pre_locked);
186 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 1);
197 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 0);
dcn20_dwb.h 65 SRI2(CNV_UPDATE, CNV, inst),\
138 SF(CNV_UPDATE, CNV_UPDATE_PENDING, mask_sh),\
139 SF(CNV_UPDATE, CNV_UPDATE_TAKEN, mask_sh),\
140 SF(CNV_UPDATE, CNV_UPDATE_LOCK, mask_sh),\
365 uint32_t CNV_UPDATE;

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