| /src/crypto/external/apache2/openssl/dist/util/perl/OpenSSL/ |
| Glob.pm | 17 goto &CORE::glob;
|
| /src/crypto/external/bsd/openssl/dist/util/perl/OpenSSL/ |
| Glob.pm | 17 goto &CORE::glob;
|
| /src/crypto/external/bsd/openssl.old/dist/util/perl/OpenSSL/ |
| Glob.pm | 17 goto &CORE::glob;
|
| /src/crypto/external/bsd/netpgp/dist/bindings/perl/ |
| Makefile | 12 CPPFLAGS+=-I/usr/pkg/lib/perl5/5.10.0/i386-netbsd-thread-multi/CORE
|
| /src/external/gpl3/gcc.old/dist/gcc/config/aarch64/ |
| aarch64-opts.h | 39 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
|
| driver-aarch64.cc | 29 #include "diagnostic-core.h"
82 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
109 /* Check wether the CORE array is the same as the big.LITTLE BL_CORE.
110 For an example CORE={0xd08, 0xd03} and
114 valid_bL_core_p (unsigned int *core, unsigned int bL_core)
116 return AARCH64_BIG_LITTLE (core[0], core[1]) == bL_core
117 || AARCH64_BIG_LITTLE (core[1], core[0]) == bL_core;
215 /* Return true iff ARR contains CORE, in either of the two elements. *
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/aarch64/ |
| aarch64-opts.h | 41 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
|
| driver-aarch64.cc | 30 #include "diagnostic-core.h"
84 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
124 /* Check wether the CORE array is the same as the big.LITTLE BL_CORE.
125 For an example CORE={0xd08, 0xd03} and
129 valid_bL_core_p (unsigned int *core, unsigned int bL_core)
131 return AARCH64_BIG_LITTLE (core[0], core[1]) == bL_core
132 || AARCH64_BIG_LITTLE (core[1], core[0]) == bL_core;
230 /* Return true iff ARR contains CORE, in either of the two elements. *
[all...] |
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-mep.h | 92 /* Support for core/vliw mode switching. */
93 #define CORE 0
|
| tc-mep.c | 54 static int mode = CORE; /* Start in core mode. */
82 { "core", mep_switch_to_core_mode, 0 },
350 if no -m options are given, all core opcodes are enabled;\n\
505 /* Store the configuration number and core. */
584 an internally parallel core or an internally parallel coprocessor,
608 /* We have one core and one copro insn. If their sizes
613 as_bad (_("core and copro insn lengths must total 32 bits."));
616 as_bad (_("vliw group must consist of 1 core and 1 copro insn."));
623 1. The instruction is a 32 bit core or coprocessor insn an
[all...] |
| tc-i386.c | 1076 ARCH (prescott, NOCONA, CORE, false),
1078 ARCH (yonah, CORE, CORE, true),
1079 ARCH (core, CORE, CORE, false),
|
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-mep.h | 92 /* Support for core/vliw mode switching. */
93 #define CORE 0
|
| tc-mep.c | 54 static int mode = CORE; /* Start in core mode. */
82 { "core", mep_switch_to_core_mode, 0 },
350 if no -m options are given, all core opcodes are enabled;\n\
505 /* Store the configuration number and core. */
584 an internally parallel core or an internally parallel coprocessor,
608 /* We have one core and one copro insn. If their sizes
613 as_bad (_("core and copro insn lengths must total 32 bits."));
616 as_bad (_("vliw group must consist of 1 core and 1 copro insn."));
623 1. The instruction is a 32 bit core or coprocessor insn an
[all...] |
| tc-i386.c | 1061 ARCH (prescott, NOCONA, CORE, false),
1063 ARCH (yonah, CORE, CORE, true),
1064 ARCH (core, CORE, CORE, false),
|
| /src/external/gpl3/gcc/dist/libgcc/config/score/ |
| crtn.S | 1 # crtn.S for Sunplus S+CORE
|
| crti.S | 1 # crti.S for Sunplus S+CORE
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/score/ |
| crtn.S | 1 # crtn.S for Sunplus S+CORE
|
| crti.S | 1 # crti.S for Sunplus S+CORE
|
| /src/external/gpl3/gcc.old/dist/gcc/common/config/aarch64/ |
| aarch64-common.cc | 187 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
|
| /src/external/gpl3/gcc/dist/libgcc/ |
| unwind-arm-common.inc | 117 /* Restore core register state. Never returns. */
134 /* Core unwinding functions. */
163 /* This is a wrapper to be called when we need to restore core registers.
171 #define uw_restore_core_regs(TARGET, CORE) \
176 restore_core_regs (CORE); \
461 vrs->core.r[FDPIC_REGNUM] = _Unwind_gnu_Find_got (VRS_PC (vrs));
464 uw_restore_core_regs (vrs, &vrs->core);
480 /* Save the core registers. */
481 saved_vrs.core = entry_vrs->core;
[all...] |
| /src/external/gpl3/gcc.old/dist/libgcc/ |
| unwind-arm-common.inc | 117 /* Restore core register state. Never returns. */
134 /* Core unwinding functions. */
163 /* This is a wrapper to be called when we need to restore core registers.
171 #define uw_restore_core_regs(TARGET, CORE) \
176 restore_core_regs (CORE); \
461 vrs->core.r[FDPIC_REGNUM] = _Unwind_gnu_Find_got (VRS_PC (vrs));
464 uw_restore_core_regs (vrs, &vrs->core);
480 /* Save the core registers. */
481 saved_vrs.core = entry_vrs->core;
[all...] |
| /src/external/bsd/nvi/dist/dist/ExtUtils/ |
| Embed.pm | 204 $MM->catdir("-L$Config{archlib}", "CORE"), " -lperl",
225 print " -I$Config{archlib}/CORE ";
422 -I $Config{archlib}/CORE
426 perl -MConfig -e 'print "-I $Config{archlib}/CORE"'
|
| /src/external/gpl3/gcc/dist/gcc/config/csky/ |
| csky.cc | 43 #include "diagnostic-core.h"
267 enum csky_processor_type core; member in struct:csky_processors
276 #define CSKY_CORE(NAME, CORE, X, ARCH, ISA) \
277 {NAME, TARGET_CPU_##CORE, #ARCH, CSKY_BASE_ARCH_##ARCH, \
288 #define CSKY_ARCH(NAME, CORE, ARCH, ISA) \
289 {NAME, TARGET_CPU_##CORE, #ARCH, CSKY_BASE_ARCH_##ARCH, \
322 /* CPU identifier for the core we're compiling for (architecturally). */
2564 /* The selected cpu may be an architecture, so lookup tuning by core ID. */
2566 csky_selected_tune = &all_cores[csky_selected_cpu->core];
2577 target->arch_core = csky_selected_cpu->core;
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/csky/ |
| csky.cc | 43 #include "diagnostic-core.h"
268 enum csky_processor_type core; member in struct:csky_processors
277 #define CSKY_CORE(NAME, CORE, X, ARCH, ISA) \
278 {NAME, TARGET_CPU_##CORE, #ARCH, CSKY_BASE_ARCH_##ARCH, \
289 #define CSKY_ARCH(NAME, CORE, ARCH, ISA) \
290 {NAME, TARGET_CPU_##CORE, #ARCH, CSKY_BASE_ARCH_##ARCH, \
323 /* CPU identifier for the core we're compiling for (architecturally). */
2558 /* The selected cpu may be an architecture, so lookup tuning by core ID. */
2560 csky_selected_tune = &all_cores[csky_selected_cpu->core];
2571 target->arch_core = csky_selected_cpu->core;
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| aarch64-tbl.h | 2868 #define CORE &aarch64_feature_v8
2956 { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }
4277 {"ldpsw", 0x69400000, 0xffc00000, ldstpair_off, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X32, F_SUBCLASS_OTHER, 0, 0, VERIFIER (ldpsw)},
4284 {"ldpsw", 0x68c00000, 0xfec00000, ldstpair_indexed, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_X32, F_SUBCLASS_OTHER, 0, 0, VERIFIER (ldpsw)},
|
