HomeSort by: relevance | last modified time | path
    Searched refs:CPUINFO_VA (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/arch/sparc/sparc/
lock_stubs.s 50 curlwp = CPUINFO_VA + CPUINFO_CURLWP
125 sethi %hi(CPUINFO_VA+CPUINFO_MTX_COUNT), %o4
126 ld [ %o4 + %lo(CPUINFO_VA+CPUINFO_MTX_COUNT) ], %o5
128 st %o1, [ %o4 + %lo(CPUINFO_VA+CPUINFO_MTX_COUNT) ]
143 sethi %hi(CPUINFO_VA+CPUINFO_MTX_OLDSPL), %o4
145 st %o3, [ %o4 + %lo(CPUINFO_VA+CPUINFO_MTX_OLDSPL) ]
170 sethi %hi(CPUINFO_VA+CPUINFO_MTX_OLDSPL), %o2
171 ld [ %o2 + %lo(CPUINFO_VA+CPUINFO_MTX_OLDSPL) ], %o3
172 sethi %hi(CPUINFO_VA+CPUINFO_MTX_COUNT), %o2
173 ld [ %o2 + %lo(CPUINFO_VA+CPUINFO_MTX_COUNT) ], %o
    [all...]
vaddrs.h 130 #define CPUINFO_VA (KERNBASE+8192)
locore.s 89 /* We rely on the fact that %lo(CPUINFO_VA) is zero */
90 .if CPUINFO_VA & 0x1fff
145 _EINTSTACKP = CPUINFO_VA + CPUINFO_EINTSTACK
148 * CPUINFO_VA is a CPU-local virtual address; cpi->ci_self is a global
152 _CISELFP = CPUINFO_VA + CPUINFO_SELF
153 _CIFLAGS = CPUINFO_VA + CPUINFO_FLAGS
156 _WANT_AST = CPUINFO_VA + CPUINFO_WANT_AST
181 cpcb = CPUINFO_VA + CPUINFO_CURPCB
184 curlwp = CPUINFO_VA + CPUINFO_CURLWP
345 sethi %hi(CPUINFO_VA + CPUINFO_TT), tmp;
    [all...]
bsd_fdintr.s 171 INCR64X(CPUINFO_VA+CPUINFO_NINTR, %l4, %l5, %l7)
pmap.c 3512 cpus[0] = (struct cpu_info *)CPUINFO_VA;
3538 vaddr_t sva, cpuinfo_va; local in function:pmap_bootstrap4m
3693 * that's cache congruent to the fixed address CPUINFO_VA.
3715 cpuinfo_data = (uint8_t *)CPUINFO_VA;
3911 cpuinfo_va = sva +
3912 (((CPUINFO_VA & (align - 1)) + align - sva) & (align - 1));
3915 * Either remap from CPUINFO_VA to the new correct value
3919 for (off = 0, va = cpuinfo_va;
3923 PMAP_BOOTSTRAP_VA2PA(CPUINFO_VA + off);
3931 memset((void *)cpuinfo_va, 0, sizeof(struct cpu_info))
    [all...]
  /src/sys/arch/sparc64/include/
locore.h 31 #define CURLWP (CPUINFO_VA + CI_CURLWP)
32 #define CPCB (CPUINFO_VA + CI_CPCB)
33 #define FPLWP (CPUINFO_VA + CI_FPLWP)
param.h 156 * KERNEND+0x018000: CPUINFO_VA -- cpu_info structure
178 #define CPUINFO_VA ( EINTSTACK )
cpu.h 97 * pmap and a single locked TTE a CPUINFO_VA for that particular processor.
98 * Each processor's cpu_info is accessible at CPUINFO_VA only for that
118 * and an alias VA CPUINFO_VA which is the same on each
120 * CPUINFO_VA is how we locate our cpu_info, we have to
268 #define CURCPU_INT() ((struct cpu_info *)CPUINFO_VA)
  /src/sys/arch/sparc64/sparc64/
lock_stubs.s 41 #define CURLWP (CPUINFO_VA+CI_CURLWP)
cpu.c 342 cpi = (struct cpu_info *)(va0 + CPUINFO_VA - INTSTACK);
678 pa += CPUINFO_VA - INTSTACK;
810 char *v = (char*)CPUINFO_VA;
mp_subr.S 127 sethi %hi(CPUINFO_VA+CI_IPIEVC+EVC_SIZE*n), r2; \
128 ldx [r2 + %lo(CPUINFO_VA+CI_IPIEVC+EVC_SIZE*n)], r1; \
130 stx r1, [r2 + %lo(CPUINFO_VA+CI_IPIEVC+EVC_SIZE*n)]
locore.s 216 sethi %hi(CPUINFO_VA + CI_MMUFSA), \reg
217 LDPTR [\reg + %lo(CPUINFO_VA + CI_MMUFSA)], \reg
221 sethi %hi(CPUINFO_VA + CI_CTXBUSY), \reg
222 LDPTR [\reg + %lo(CPUINFO_VA + CI_CTXBUSY)], \reg
226 sethi %hi(CPUINFO_VA + CI_TSB_DMMU), \reg
227 LDPTR [\reg + %lo(CPUINFO_VA + CI_TSB_DMMU)], \reg
1521 sethi %hi(CPUINFO_VA + CI_EINTSTACK), %g4; \
1525 ldx [%g4 + %lo(CPUINFO_VA + CI_EINTSTACK)], %g4; \
1628 sethi %hi(CPUINFO_VA + CI_EINTSTACK), %g3; \
1630 LDPTR [%g3 + %lo(CPUINFO_VA + CI_EINTSTACK)], %g3;
    [all...]
pmap.c 1150 cpus = (struct cpu_info *)(intstk + CPUINFO_VA - INTSTACK);
2423 kcpu->cpubase = (uint64_t)CPUINFO_VA;
  /src/sys/arch/sparc/include/
cpu.h 193 * and an alias VA CPUINFO_VA which is the same on each
195 * CPUINFO_VA is how we locate our cpu_info, we have to
416 #define cpuinfo (*(struct cpu_info *)CPUINFO_VA)

Completed in 23 milliseconds