/src/sys/arch/amd64/amd64/ |
spl.S | 86 movzbl CPUVAR(ILEVEL),%eax 89 movb %dil,CPUVAR(ILEVEL) 114 movb $IPL_HIGH,CPUVAR(ILEVEL) 115 movq CPUVAR(CURLWP),%r15 133 movq %rdi,CPUVAR(CURLWP) 201 xchgq %r15,CPUVAR(CURLWP) /* restore curlwp */ 216 incl CPUVAR(MTX_COUNT) /* re-adjust after mi_switch */ 229 orq %rdi,CPUVAR(IPENDING) /* atomic on local cpu */ 239 movb $IPL_PREEMPT,CPUVAR(ILEVEL) 254 movb $IPL_PREEMPT,CPUVAR(ILEVEL [all...] |
lock_stubs.S | 58 movq CPUVAR(CURLWP), %rcx 78 movq CPUVAR(CURLWP), %rax 94 movzbl CPUVAR(ILEVEL), %esi 98 movb %cl, CPUVAR(ILEVEL) /* splraiseipl() */ 99 subl %eax, CPUVAR(MTX_COUNT) /* decl doesnt set CF */ 100 cmovncl CPUVAR(MTX_OLDSPL), %esi 101 movl %esi, CPUVAR(MTX_OLDSPL) 121 movq CPUVAR(SELF), %r8 140 movq CPUVAR(SELF), %rsi 201 2: movq CPUVAR(CURLWP), %rc [all...] |
vector.S | 126 movzbl CPUVAR(ILEVEL),%ebx 134 movzbl CPUVAR(ILEVEL),%ebx 141 incl CPUVAR(IDEPTH) 142 movb $IPL_HIGH,CPUVAR(ILEVEL) 148 btsq $LIR_IPI,CPUVAR(IPENDING) 226 movzbl CPUVAR(ILEVEL),%ebx 234 movzbl CPUVAR(ILEVEL),%ebx 241 incl CPUVAR(IDEPTH) 242 movb $IPL_CLOCK,CPUVAR(ILEVEL) 250 btsq $LIR_TIMER,CPUVAR(IPENDING [all...] |
amd64_trap.S | 119 movq CPUVAR(CURLWP),%rax 128 movq %rax,CPUVAR(SCRATCH) 157 movq CPUVAR(SCRATCH),%rsp 280 incq CPUVAR(NTRAP) 287 incq CPUVAR(NTRAP) 350 movzbl CPUVAR(ILEVEL),%ebx 385 incq CPUVAR(NTRAP) 442 movzbl CPUVAR(ILEVEL),%ebx 456 movq CPUVAR(CURLWP),%r14 460 movzbl CPUVAR(ILEVEL),%eb [all...] |
cpufunc.S | 138 cmpl %edi, CPUVAR(CURLDT) 142 movl %edi, CPUVAR(CURLDT) 268 #define ADD_counter32 addl CPUVAR(CC_SKEW), %eax 271 addq CPUVAR(CC_SKEW), %rax 278 movq CPUVAR(CURLWP), %rcx ;\ 301 movq CPUVAR(CURLWP), %r8 ;\ 322 movq CPUVAR(CURLWP), %r8 346 movq CPUVAR(CURLWP), %r8
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locore.S | 998 * the %gs-relative addressing used by CPUVAR(...), curcpu(), 1394 xchgq %rcx,CPUVAR(CURLWP) 1401 movb $0, CPUVAR(XEN_CLOCKF_USERMODE) 1402 movq $_C_LABEL(cpu_switchto), CPUVAR(XEN_CLOCKF_PC) 1430 movq CPUVAR(RSP0),%rax 1431 movq CPUVAR(TSS),%rdi 1440 movq CPUVAR(TSS),%rdi 1479 movb $IPL_HIGH,CPUVAR(ILEVEL) 1499 movq CPUVAR(GDT),%rcx 1517 movq CPUVAR(GDT),%rc [all...] |
copy.S | 47 movq CPUVAR(CURLWP),reg; \ 88 movq CPUVAR(CURLWP),%rbx 99 cmpl $0,CPUVAR(WANT_PMAPLOAD)
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/src/sys/arch/i386/i386/ |
spl.S | 52 movzbl CPUVAR(ILEVEL),%eax 55 movb %dl,CPUVAR(ILEVEL) 90 cmpb CPUVAR(ILEVEL),%cl 92 movl CPUVAR(IUNMASK)(,%ecx,8),%edx 93 movl CPUVAR(IUNMASK)+4(,%ecx,8),%eax 96 testl CPUVAR(IPENDING),%edx 98 testl CPUVAR(IPENDING)+4,%eax 100 movb %cl,CPUVAR(ILEVEL) 128 movzbl CPUVAR(ILEVEL),%edx 138 movl CPUVAR(IPENDING),%ea [all...] |
lock_stubs.S | 169 subl CPUVAR(CURLWP), %ecx 234 movb CPUVAR(ILEVEL), %cl 239 movb %ch, CPUVAR(ILEVEL) /* splraiseipl() */ 241 subl %eax, CPUVAR(MTX_COUNT) /* decl does not set CF */ 243 movb %cl, CPUVAR(MTX_OLDSPL) 263 movl CPUVAR(MTX_OLDSPL), %ecx 264 incl CPUVAR(MTX_COUNT) 267 movl CPUVAR(IUNMASK)(,%ecx,8), %edx 268 movl CPUVAR(IUNMASK)+4(,%ecx,8), %eax 270 testl CPUVAR(IPENDING), %ed [all...] |
i386_trap.S | 149 addl $1,CPUVAR(NTRAP) /* statistical info */ 150 adcl $0,CPUVAR(NTRAP)+4 218 movzbl CPUVAR(ILEVEL),%ebx 283 movzbl CPUVAR(ILEVEL),%ebx 299 movzbl CPUVAR(ILEVEL),%ebx 301 addl $1,CPUVAR(NTRAP) /* statistical info */ 302 adcl $0,CPUVAR(NTRAP)+4 408 movzbl CPUVAR(ILEVEL),%ebx 410 addl $1,CPUVAR(NTRAP) /* statistical info */ 411 adcl $0,CPUVAR(NTRAP)+ [all...] |
vector.S | 123 addl CPUVAR(GDT),%eax ;\ 168 movzbl CPUVAR(ILEVEL),%ebx 179 movzbl CPUVAR(ILEVEL),%ebx 187 movb $IPL_HIGH,CPUVAR(ILEVEL) 193 btsl $(LIR_IPI - 32),CPUVAR(IPENDING)+4 293 movzbl CPUVAR(ILEVEL),%ebx 304 movzbl CPUVAR(ILEVEL),%ebx 312 movb $IPL_CLOCK,CPUVAR(ILEVEL) 320 btsl $(LIR_TIMER - 32),CPUVAR(IPENDING)+4 340 movzbl CPUVAR(ILEVEL),%eb [all...] |
i386func.S | 54 cmpl %eax, CPUVAR(CURLDT) 58 movl %eax, CPUVAR(CURLDT)
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cpufunc.S | 180 movl CPUVAR(CURLWP), %ecx 191 movl CPUVAR(CURLWP), %ecx 202 movl CPUVAR(CURLWP), %ecx 209 #define ADD_counter32 addl CPUVAR(CC_SKEW), %eax 211 adcl CPUVAR(CC_SKEW+4), %edx 219 movl CPUVAR(CURLWP), %ecx ;\ 243 movl CPUVAR(CURLWP), %ecx ;\
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locore.S | 1096 * for %fs. Thus, after this point, CPUVAR(...), curcpu(), and 1614 xchgl %ecx,CPUVAR(CURLWP) 1621 movb $0, CPUVAR(XEN_CLOCKF_USERMODE) 1622 movl $_C_LABEL(cpu_switchto), CPUVAR(XEN_CLOCKF_PC) 1636 movl CPUVAR(TSS),%ecx 1660 movl CPUVAR(GDT),%ecx 1675 movl CPUVAR(TSS),%eax 1717 movl CPUVAR(TSS),%edi 1723 movl CPUVAR(TSS),%eax 1752 movzbl CPUVAR(ILEVEL),%eb [all...] |
copy.S | 77 movl CPUVAR(CURLWP),reg; \ 113 movl CPUVAR(CURLWP),%ebx 125 cmpl $0,CPUVAR(WANT_PMAPLOAD) 141 movl CPUVAR(CURLWP),%edx
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/src/sys/arch/i386/include/ |
frameasm.h | 21 #define CLI(reg) movl CPUVAR(VCPU),reg ; \ 23 #define STI(reg) movl CPUVAR(VCPU),reg ; \ 25 #define STIC(reg) movl CPUVAR(VCPU),reg ; \ 28 #define PUSHF(reg) movl CPUVAR(VCPU),reg ; \ 40 movl CPUVAR(VCPU),reg ; \ 105 cmpl $0, CPUVAR(WANT_PMAPLOAD) 107 #define CHECK_ASTPENDING(reg) movl CPUVAR(CURLWP),reg ; \ 118 movl CPUVAR(CURLWP),%eax ; \ 137 incl CPUVAR(IDEPTH); \ 140 movl CPUVAR(INTRSTACK), %esp; [all...] |
asm.h | 103 #define CPUVAR(off) %fs:__CONCAT(CPU_INFO_,off)
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/src/sys/arch/amd64/include/ |
frameasm.h | 27 movq CPUVAR(VCPU),%r ## temp_reg ; \ 31 movq CPUVAR(VCPU),%r ## temp_reg ; \ 35 movq CPUVAR(VCPU),%r ## temp_reg ; \ 286 incl CPUVAR(IDEPTH) 288 decl CPUVAR(IDEPTH) 331 cmpl $0, CPUVAR(WANT_PMAPLOAD)
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asm.h | 93 #define CPUVAR(off) %gs:CPU_INFO_ ## off 95 #define CPUVAR(off) %gs:CPU_INFO_/**/off
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/src/sys/arch/amd64/acpi/ |
acpi_wakeup_low.S | 92 movq CPUVAR(GDT),%rax 117 movq CPUVAR(SELF),%r8
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/src/sys/arch/i386/acpi/ |
acpi_wakeup_low.S | 75 movl CPUVAR(GDT),%eax 97 movl CPUVAR(SELF),%edx
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/src/sys/dev/nvmm/x86/ |
nvmm_x86_svmfunc.S | 82 movq CPUVAR(GDT),%rax ;\
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/src/sys/arch/mips/mips/ |
mipsX_subr.S | 327 * TLB handling data. 'CPUVAR(PMAP_SEG0TAB)' points to the base of the segment 391 lui k1, %hi(CPUVAR(PMAP_SEGTAB)) #08: k1=hi of segtab 395 PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#0b: k1=segment tab 403 lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #11: k1=hi of seg0tab 406 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#14: k1=segment tab base 423 lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #01: k1=hi of seg0tab 441 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#05: k1=seg0tab 508 lui k1, %hi(CPUVAR(EV_TLBMISSES)) #1b: k1=hi of tlbmisses 509 REG_L k0, %lo(CPUVAR(EV_TLBMISSES))(k1) #1c 511 REG_S k0, %lo(CPUVAR(EV_TLBMISSES))(k1) #1 [all...] |
locore_mips1.S | 98 lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #01: k1=hi of seg0tab 101 PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1) #04: k1=seg0tab 624 PTR_L k1, CPUVAR(CURLWP) 728 PTR_L k1, CPUVAR(CURLWP) 904 PTR_L k1, CPUVAR(CURLWP)
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/src/sys/arch/riscv/include/ |
asm.h | 274 #define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off)
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