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    Searched refs:CPU_CONTROL_WBUF_ENABLE (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/arch/arm/arm/
cpufunc.c 2409 { "nowritebuf", IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
2413 { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2414 { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2424 { "arm6.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2425 { "arm6.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2436 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
2440 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE
2472 { "arm7.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2473 { "arm7.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2487 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
    [all...]
armv6_start.S 1112 CPU_CONTROL_WBUF_ENABLE | /* not defined in 1176 (SBO) */ \
  /src/sys/arch/evbarm/armadaxp/
armadaxp_start.S 74 CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_IC_ENABLE |\
  /src/sys/arch/evbarm/ixm1200/
ixm1200_start.S 66 orr r0, r0, #CPU_CONTROL_WBUF_ENABLE
  /src/sys/arch/epoc32/epoc32/
epoc32_start.S 238 CPU_CONTROL_WBUF_ENABLE | \
  /src/sys/arch/evbarm/marvell/
marvell_start.S 244 biceq r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE)
  /src/sys/arch/acorn32/stand/boot32/
start.S 152 orr r0, r0, #CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_MMU_ENABLE
  /src/sys/arch/evbarm/gemini/
gemini_start.S 317 CPU_CONTROL_WBUF_ENABLE | \
  /src/sys/arch/arm/arm32/
cpu.c 751 if ((ci->ci_ctrl & CPU_CONTROL_WBUF_ENABLE) == 0)
  /src/sys/arch/arm/include/
armreg.h 189 #define CPU_CONTROL_WBUF_ENABLE 0x00000008 /* W: Write buffer enable */

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