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    Searched refs:CP_ME2_PIPE1_INT_CNTL (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
cikd.h 1365 #define CP_ME2_PIPE1_INT_CNTL 0xC228
radeon_cik.c 6901 WREG32(CP_ME2_PIPE1_INT_CNTL, 0);
7084 cp_m2p1 = RREG32(CP_ME2_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
7255 WREG32(CP_ME2_PIPE1_INT_CNTL, cp_m2p1);
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v8_0.c 6664 WREG32_FIELD(CP_ME2_PIPE1_INT_CNTL, CP_ECC_ERROR_INT_ENABLE,

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