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Searched refs:CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v7_0.c	`3918 data &= ~CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK;`
amdgpu_gfx_v9_0.c	`2765 data &= ~CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK;`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_sh_mask.h	`2848 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xffff0000L`
gfx_7_2_sh_mask.h	`3083 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xffff0000`
gfx_8_0_sh_mask.h	`3697 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xffff0000 [all...]`
gfx_8_1_sh_mask.h	`4219 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xffff0000 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_sh_mask.h	`1222 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xFFFF0000L [all...]`
gc_9_1_sh_mask.h	`1121 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xFFFF0000L [all...]`
gc_9_2_1_sh_mask.h	`1088 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xFFFF0000L [all...]`
gc_10_1_0_sh_mask.h	`6706 #define CP_RB_WPTR_POLL_CNTL__IDLE_POLL_COUNT_MASK 0xFFFF0000L [all...]`

Completed in 533 milliseconds