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Searched refs:CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`4126 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) \| 4171 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) \|`
amdgpu_gfx_v9_0.c	`4619 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) \| 4673 data = (0x0100 << CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT) \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_sh_mask.h	`2851 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x00000000`
gfx_7_2_sh_mask.h	`3082 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0`
gfx_8_0_sh_mask.h	`3696 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`
gfx_8_1_sh_mask.h	`4218 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_sh_mask.h	`1219 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`
gc_9_1_sh_mask.h	`1118 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`
gc_9_2_1_sh_mask.h	`1085 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`
gc_10_1_0_sh_mask.h	`6703 #define CP_RB_WPTR_POLL_CNTL__POLL_FREQUENCY__SHIFT 0x0 [all...]`

Completed in 695 milliseconds