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    Searched refs:CR0 (Results 1 - 17 of 17) sorted by relevancy

  /src/external/gpl3/gcc/dist/gcc/config/rs6000/
htmintrin.h 39 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
  /src/external/gpl3/gcc.old/dist/gcc/config/rs6000/
htmintrin.h 39 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
  /src/external/apache2/llvm/dist/clang/lib/Headers/
htmintrin.h 26 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
  /src/sys/sys/
ioctl_compat.h 117 #define CR0 0x00000000
  /src/lib/librpcsvc/
rex.x 122 const CR0 = 0x00000000;
  /src/sys/arch/i386/stand/dosboot/
start_dos.S 141 movl %cr0, %eax
211 # set the PE bit of CR0
212 movl %cr0, %eax
214 movl %eax, %cr0
266 # clear the PE bit of CR0
267 movl %cr0, %eax
269 movl %eax, %cr0
  /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/sys/posix/
termios.d 970 CR0
1005 enum CR0 = 0x0000000; // 0000000
1040 enum CR0 = 0x00000000;
1075 //enum CR0
1109 //enum CR0
1143 //enum CR0
1177 //enum CR0
1212 enum CR0 = 0x0000000;
1247 enum CR0 = 0x0000000; // 0000000
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCRegisterInfo.h 30 Reg = PPC::CR0;
PPCRegisterInfo.cpp 672 // here because we might clobber cr0 while it is live.
689 // here because we might clobber cr0 while it is live.
772 /// rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot.
798 // If the saved register wasn't CR0, shift the bits left so that they are in
799 // CR0's slot.
800 if (SrcReg != PPC::CR0) {
843 // If the reloaded register isn't CR0, shift the bits right so that they are
845 if (DestReg != PPC::CR0) {
PPCInstrInfo.cpp 2525 if (&*I != &CmpInstr && (Instr.modifiesRegister(PPC::CR0, TRI) ||
2526 Instr.readsRegister(PPC::CR0, TRI)))
2644 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0);
2646 // Even if CR0 register were dead before, it is alive now since the
2648 MI->clearRegisterDeads(PPC::CR0);
2721 assert(MI->definesRegister(PPC::CR0) &&
2722 "Record-form instruction does not define cr0?");
3167 // CR0 if the original instruction was a record-form instruction).
3180 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine);
4970 // setting CR0)
    [all...]
PPCISelLowering.cpp 11078 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
11081 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
11085 .addImm(CmpPred).addReg(PPC::CR0).addMBB(exitMBB);
11093 .addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);
11333 BuildMI(BB, dl, TII->get(CmpOpcode), PPC::CR0)
11338 .addReg(PPC::CR0)
11351 .addReg(PPC::CR0)
12156 BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0)
12161 .addReg(PPC::CR0)
12173 .addReg(PPC::CR0)
    [all...]
PPCFrameLowering.cpp 1348 Register CRReg = PPC::CR0;
PPCISelDAGToDAG.cpp 2838 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32);
2887 // Select this node to a single bit from CR0 set by the record-form node
3965 // cmpw cr0, r3, r2
3968 // cmplwi cr0,r0,0x5678
3969 // beq cr0,L6
4009 // cmpd cr0, r3, r2
4012 // cmpldi cr0,r0,0x5678
4013 // beq cr0,L6
5369 SDValue CR0Reg = CurDAG->getRegister(PPC::CR0, MVT::i32);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCCodeEmitter.cpp 411 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
438 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
PPCInstPrinter.cpp 493 case PPC::CR0: RegNo = 0; break;
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
GuardWidening.cpp 512 ConstantRange CR0 =
518 // CR0 and CR1, while SupersetIntersect is a superset of the actual
521 // of CR0 and CR1, and can use the same to generate an icmp instruction.
526 auto SubsetIntersect = CR0.inverse().unionWith(CR1.inverse()).inverse();
527 auto SupersetIntersect = CR0.intersectWith(CR1);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/Disassembler/
X86DisassemblerDecoder.h 360 ENTRY(CR0) \

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