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    Searched refs:CRTC_INTERLACE_HALVE_V (Results 1 - 11 of 11) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_encoders.c 195 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
amdgpu_connectors.c 634 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
amdgpu_atombios_encoders.c 2065 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
  /src/sys/external/bsd/drm2/dist/include/drm/
drm_modes.h 161 #define CRTC_INTERLACE_HALVE_V (1 << 0) /* halve V values for interlacing */
  /src/sys/external/bsd/drm2/dist/drm/
drm_modes.c 846 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
871 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
1936 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
2072 drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V);
drm_probe_helper.c 548 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_encoders.c 358 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
radeon_connectors.c 795 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
radeon_combios.c 1288 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
radeon_atombios.c 1686 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/
nouveau_dispnv50_head.c 265 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE);

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