HomeSort by: relevance | last modified time | path
    Searched refs:CR_RXEN (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/arch/arm/xilinx/
zynq_uartreg.h 39 #define CR_RXEN __BIT(2)
zynq_uart.c 396 sc->sc_cr |= CR_TXEN | CR_RXEN;
  /src/sys/arch/sandpoint/stand/altboot/
rge.c 89 #define CR_RXEN (1U << 3) /* Rx enable */
218 CSR_WRITE_1(l, RGE_CR, CR_TXEN | CR_RXEN);
  /src/sys/dev/ic/
dp83932reg.h 168 #define CR_RXEN (1U << 3) /* Receiver Enable */
dp83932.c 1024 CSR_WRITE(sc, SONIC_CR, CR_RXEN | CR_RRRA);
1080 if ((CSR_READ(sc, SONIC_CR) & (CR_TXP | CR_RXEN | CR_ST)) == 0)
1084 if ((CSR_READ(sc, SONIC_CR) & (CR_TXP | CR_RXEN | CR_ST)) != 0)
  /src/sys/arch/newsmips/apbus/
if_snreg.h 97 #define CR_RXEN 0x0008 /* receiver enable */
if_sn.c 426 NIC_PUT(sc, SNR_CR, CR_RXEN);

Completed in 133 milliseconds