| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCMachineScheduler.cpp | 24 static bool isADDIInstr(const GenericScheduler::SchedCandidate &Cand) {
25 return Cand.SU->getInstr()->getOpcode() == PPC::ADDI ||
26 Cand.SU->getInstr()->getOpcode() == PPC::ADDI8;
29 bool PPCPreRASchedStrategy::biasAddiLoadCandidate(SchedCandidate &Cand,
35 SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand;
36 SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand;
49 void PPCPreRASchedStrategy::tryCandidate(SchedCandidate &Cand,
55 if (!Cand.isValid()) {
62 biasPhysReg(Cand.SU, Cand.AtTop), TryCand, Cand, PhysReg)
[all...] |
| PPCMachineScheduler.h | 26 void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand,
29 bool biasAddiLoadCandidate(SchedCandidate &Cand,
46 void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand) override;
47 bool biasAddiCandidate(SchedCandidate &Cand, SchedCandidate &TryCand) const;
|
| PPCBranchCoalescing.cpp | 155 bool canCoalesceBranch(CoalescingCandidateInfo &Cand);
231 ///\param[in,out] Cand The coalescing candidate to analyze
234 bool PPCBranchCoalescing::canCoalesceBranch(CoalescingCandidateInfo &Cand) {
236 << Cand.BranchBlock->getNumber() << " can be coalesced:");
239 if (TII->analyzeBranch(*Cand.BranchBlock, Cand.BranchTargetBlock, FalseMBB,
240 Cand.Cond)) {
245 for (auto &I : Cand.BranchBlock->terminators()) {
270 if (Cand.BranchBlock->isEHPad() || Cand.BranchBlock->hasEHPadSuccessor())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| LoopLoadElimination.cpp | 135 const StoreToLoadForwardingCandidate &Cand) {
136 OS << *Cand.Store << " -->\n";
137 OS.indent(2) << *Cand.Load << "\n";
266 for (const auto &Cand : Candidates) {
271 LoadToSingleCand.insert(std::make_pair(Cand.Load, &Cand));
281 if (Cand.Store->getParent() == OtherCand->Store->getParent() &&
282 Cand.isDependenceDistanceOfOne(PSE, L) &&
285 if (getInstrIndex(OtherCand->Store) < getInstrIndex(Cand.Store))
286 OtherCand = &Cand;
[all...] |
| GVNSink.cpp | 752 SinkingInstructionCandidate Cand;
753 Cand.NumInstructions = ++InstNum;
754 Cand.NumMemoryInsts = MemoryInstNum;
755 Cand.NumBlocks = ActivePreds.size();
756 Cand.NumPHIs = NeededPHIs.size();
757 append_range(Cand.Blocks, ActivePreds);
759 return Cand;
795 auto Cand = analyzeInstructionForSinking(LRI, InstNum, MemoryInstNum,
797 if (!Cand)
799 Cand->calculateCost(NumOrigPHIs, Preds.size())
[all...] |
| ConstantHoisting.cpp | 384 ConstPtrUnionType Cand = ConstInt;
385 std::tie(Itr, Inserted) = ConstCandMap.insert(std::make_pair(Cand, 0));
434 ConstPtrUnionType Cand = ConstExpr;
435 std::tie(Itr, Inserted) = ConstCandMap.insert(std::make_pair(Cand, 0));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| GCNSchedStrategy.cpp | 57 void GCNMaxOccupancySchedStrategy::initCandidate(SchedCandidate &Cand, SUnit *SU,
63 Cand.SU = SU;
64 Cand.AtTop = AtTop;
108 Cand.RPDelta.Excess = PressureChange(AMDGPU::RegisterPressureSets::VGPR_32);
109 Cand.RPDelta.Excess.setUnitInc(NewVGPRPressure - VGPRExcessLimit);
114 Cand.RPDelta.Excess = PressureChange(AMDGPU::RegisterPressureSets::SReg_32);
115 Cand.RPDelta.Excess.setUnitInc(NewSGPRPressure - SGPRExcessLimit);
129 Cand.RPDelta.CriticalMax =
131 Cand.RPDelta.CriticalMax.setUnitInc(SGPRDelta);
133 Cand.RPDelta.CriticalMax
[all...] |
| SIMachineScheduler.cpp | 142 SISchedulerCandidate &Cand,
149 if (Cand.Reason > Reason)
150 Cand.Reason = Reason;
153 Cand.setRepeat(Reason);
159 SISchedulerCandidate &Cand,
166 if (Cand.Reason > Reason)
167 Cand.Reason = Reason;
170 Cand.setRepeat(Reason);
184 void SIScheduleBlock::traceCandidate(const SISchedCandidate &Cand) {
186 dbgs() << " SU(" << Cand.SU->NodeNum << ") " << getReasonStr(Cand.Reason)
[all...] |
| GCNSchedStrategy.h | 36 SchedCandidate &Cand);
38 void initCandidate(SchedCandidate &Cand, SUnit *SU,
|
| SIMachineScheduler.h | 203 void tryCandidateTopDown(SISchedCandidate &Cand, SISchedCandidate &TryCand);
204 void tryCandidateBottomUp(SISchedCandidate &Cand, SISchedCandidate &TryCand);
206 void traceCandidate(const SISchedCandidate &Cand);
387 bool tryCandidateLatency(SIBlockSchedCandidate &Cand,
389 bool tryCandidateRegUsage(SIBlockSchedCandidate &Cand,
|
| GCNMinRegStrategy.cpp | 123 auto &Cand = *I++;
124 RQ.remove(Cand);
125 RQ.push_front(Cand);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| MachineScheduler.cpp | 2766 void GenericSchedulerBase::traceCandidate(const SchedCandidate &Cand) {
2770 switch (Cand.Reason) {
2774 P = Cand.RPDelta.Excess;
2777 P = Cand.RPDelta.CriticalMax;
2780 P = Cand.RPDelta.CurrentMax;
2783 ResIdx = Cand.Policy.ReduceResIdx;
2786 ResIdx = Cand.Policy.DemandResIdx;
2789 Latency = Cand.SU->getDepth();
2792 Latency = Cand.SU->getHeight();
2795 Latency = Cand.SU->getHeight()
[all...] |
| RegAllocGreedy.cpp | 458 bool growRegion(GlobalSplitCandidate &Cand);
459 bool splitCanCauseEvictionChain(Register Evictee, GlobalSplitCandidate &Cand,
463 GlobalSplitCandidate &Cand, unsigned BBNumber,
1355 bool RAGreedy::growRegion(GlobalSplitCandidate &Cand) {
1358 SmallVectorImpl<unsigned> &ActiveBlocks = Cand.ActiveBlocks;
1388 if (Cand.PhysReg) {
1389 if (!addThroughConstraints(Cand.Intf, NewBlocks))
1411 bool RAGreedy::calcCompactRegion(GlobalSplitCandidate &Cand) {
1417 Cand.reset(IntfCache, MCRegister::NoRegister);
1423 SpillPlacer->prepare(Cand.LiveBundles)
[all...] |
| MachineOutliner.cpp | 679 for (auto &Cand : OF.Candidates) {
681 MachineBasicBlock &OutlineBB = *Cand.front()->getParent();
685 reverse(make_range(Cand.front(), OutlineBB.end())))
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| MachineScheduler.h | 919 void traceCandidate(const SchedCandidate &Cand);
930 GenericSchedulerBase::SchedCandidate &Cand,
934 GenericSchedulerBase::SchedCandidate &Cand,
937 GenericSchedulerBase::SchedCandidate &Cand,
942 GenericSchedulerBase::SchedCandidate &Cand,
1011 void initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop,
1015 virtual void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand,
1078 virtual void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand);
1080 void pickNodeFromQueue(SchedCandidate &Cand);
|
| /src/external/apache2/llvm/dist/clang/lib/Sema/ |
| SemaOverload.cpp | 1382 for (OverloadCandidateSet::iterator Cand = Conversions.begin();
1383 Cand != Conversions.end(); ++Cand)
1384 if (Cand->Best)
1385 ICS.Ambiguous.addConversion(Cand->FoundDecl, Cand->Function);
4709 for (OverloadCandidateSet::iterator Cand = CandidateSet.begin();
4710 Cand != CandidateSet.end(); ++Cand)
4711 if (Cand->Best
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/ |
| AMDGPU.cpp | 39 RocmInstallationDetector::findSPACKPackage(const Candidate &Cand,
41 if (!Cand.isSPACK())
44 std::string Prefix = Twine(PackageName + "-" + Cand.SPACKReleaseStr).str();
46 for (llvm::vfs::directory_iterator File = D.getVFS().dir_begin(Cand.Path, EC),
57 auto PackagePath = Cand.Path;
62 llvm::errs() << "SPACK package " << Prefix << " not found at " << Cand.Path
68 llvm::errs() << "Cannot use SPACK package " << Prefix << " at " << Cand.Path
179 for (auto Cand : ROCmSearchDirs) {
181 if (Cand.isSPACK())
182 llvm::errs() << " (Spack " << Cand.SPACKReleaseStr << ")"
[all...] |
| ROCm.h | 130 llvm::SmallString<0> findSPACKPackage(const Candidate &Cand,
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| PartialInlining.cpp | 688 BasicBlock *Cand = OutliningInfo->NonReturnBlock;
689 if (succ_size(Cand) != 2)
692 if (HasNonEntryPred(Cand))
695 BasicBlock *Succ1 = *succ_begin(Cand);
696 BasicBlock *Succ2 = *(succ_begin(Cand) + 1);
703 if (NonReturnBlock->getSinglePredecessor() != Cand)
707 OutliningInfo->Entries.push_back(Cand);
709 OutliningInfo->ReturnBlockPreds.push_back(Cand);
710 Entries.insert(Cand);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ProfileData/ |
| SampleProf.h | 811 StringRef Cand(FnName);
818 auto It = Cand.rfind(Suffix);
821 auto Dit = Cand.rfind('.');
823 Cand = Cand.substr(0, It);
825 return Cand;
|
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| IRSimilarityIdentifier.cpp | 924 for (IRSimilarityCandidate &Cand : CandVec) {
925 OS << " Function: " << Cand.front()->Inst->getFunction()->getName().str()
927 if (Cand.front()->Inst->getParent()->getName().str() == "")
930 OS << Cand.front()->Inst->getParent()->getName().str();
932 Cand.frontInstruction()->print(OS);
934 Cand.backInstruction()->print(OS);
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| InstrProfiling.cpp | 282 for (auto &Cand : LoopToCandidates[&L]) {
286 Value *InitVal = ConstantInt::get(Cand.first->getType(), 0);
290 auto *BB = Cand.first->getParent();
302 PGOCounterPromoterHelper Promoter(Cand.first, Cand.second, SSA, InitVal,
305 Promoter.run(SmallVector<Instruction *, 2>({Cand.first, Cand.second}));
|
| PGOInstrumentation.cpp | 867 populateEHOperandBundle(VPCandidateInfo &Cand,
870 auto *OrigCall = dyn_cast<CallBase>(Cand.AnnotatedInst);
948 for (VPCandidateInfo Cand : FuncInfo.ValueSites[Kind]) {
952 IRBuilder<> Builder(Cand.InsertPt);
953 assert(Builder.GetInsertPoint() != Cand.InsertPt->getParent()->end() &&
957 if (Cand.V->getType()->isIntegerTy())
958 ToProfile = Builder.CreateZExtOrTrunc(Cand.V, Builder.getInt64Ty());
959 else if (Cand.V->getType()->isPointerTy())
960 ToProfile = Builder.CreatePtrToInt(Cand.V, Builder.getInt64Ty());
964 populateEHOperandBundle(Cand, BlockColors, OpBundles)
[all...] |
| /src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | 479 CodeGenRegister *Cand = const_cast<CodeGenRegister*>(Leads[i]);
481 if (Cand == this || getSubRegIndex(Cand))
483 // Check if each component of Cand is already a sub-register.
484 assert(!Cand->ExplicitSubRegs.empty() &&
486 if (Cand->ExplicitSubRegs.size() == 1)
491 assert(Cand->ExplicitSubRegs[0] == SubReg && "LeadingSuperRegs correct");
493 for (CodeGenRegister *SubReg : Cand->ExplicitSubRegs) {
505 // There is nothing to do if some Cand sub-register is not part of this
510 // Each part of Cand is a sub-register of this. Make the full Cand als
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 187 MachineInstr *MergeOpsUpdate(const MergeCandidate &Cand);
858 MachineInstr *ARMLoadStoreOpt::MergeOpsUpdate(const MergeCandidate &Cand) {
859 const MachineInstr *First = Cand.Instrs.front();
867 for (const MachineInstr *MI : Cand.Instrs) {
899 MachineInstr *LatestMI = Cand.Instrs[Cand.LatestMIIdx];
909 if (Cand.CanMergeToLSDouble)
912 Cand.Instrs);
913 if (!Merged && Cand.CanMergeToLSMulti)
915 Opcode, Pred, PredReg, DL, Regs, Cand.Instrs)
[all...] |
