HomeSort by: relevance | last modified time | path
    Searched refs:ChangeToRegister (Results 1 - 25 of 40) sorted by relevancy

1 2

  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyRegisterInfo.cpp 84 .ChangeToRegister(FrameRegister, /*isDef=*/false);
107 .ChangeToRegister(FrameRegister, /*isDef=*/false);
135 MI.getOperand(FIOperandNum).ChangeToRegister(FIRegOperand, /*isDef=*/false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFRegisterInfo.cpp 88 MI.getOperand(i).ChangeToRegister(FrameReg, false);
119 MI.getOperand(i).ChangeToRegister(FrameReg, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430RegisterInfo.cpp 136 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
153 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXRegisterInfo.cpp 125 MI.getOperand(FIOperandNum).ChangeToRegister(NVPTX::VRFrame, false);
NVPTXPrologEpilogPass.cpp 76 Op.ChangeToRegister(Reg, /*isDef=*/false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiRegisterInfo.cpp 217 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);
219 .ChangeToRegister(Reg, /*isDef=*/false, /*isImp=*/false,
239 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp 118 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
140 MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
158 MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ThumbRegisterInfo.cpp 399 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
487 MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false /*isDef*/);
528 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true);
532 MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,
550 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
554 MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,
Thumb2InstrInfo.cpp 544 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
565 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
579 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
613 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
718 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
Mips16RegisterInfo.cpp 141 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
MipsSERegisterInfo.cpp 256 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVRegisterInfo.cpp 257 .ChangeToRegister(FrameReg, false, false, FrameRegIsKill);
267 .ChangeToRegister(ScratchReg, false, false, true);
298 MI.getOperand(FIOperandNum).ChangeToRegister(VL, false, false, true);
315 MI.getOperand(FIOperandNum + 1).ChangeToRegister(VL, /*isDef=*/false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRRegisterInfo.cpp 158 MI.getOperand(FIOperandNum).ChangeToRegister(AVR::R29R28, false);
247 MI.getOperand(FIOperandNum).ChangeToRegister(AVR::R29R28, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZRegisterInfo.cpp 303 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
327 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
350 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
351 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
368 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg,
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86OptimizeLEAs.cpp 562 .ChangeToRegister(DefMI->getOperand(0).getReg(), false);
565 .ChangeToRegister(X86::NoRegister, false);
568 .ChangeToRegister(X86::NoRegister, false);
X86InstrBuilder.h 135 MI->getOperand(Operand).ChangeToRegister(Reg, /*isDef=*/false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCRegisterInfo.cpp 189 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kRegisterInfo.cpp 192 Base.ChangeToRegister(BasePtr, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VERegisterInfo.cpp 142 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp 663 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
703 .ChangeToRegister(ScratchReg, false, false, true);
726 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIRegisterInfo.cpp 752 FIOp->ChangeToRegister(BaseReg, false);
765 FIOp->ChangeToRegister(BaseReg, false);
1628 FIOp.ChangeToRegister(FrameReg, false);
1667 FIOp.ChangeToRegister(AMDGPU::M0, false);
1819 FIOp.ChangeToRegister(ResultReg, false, false, true);
1833 SOffset.ChangeToRegister(FrameReg, false);
1855 FIOp.ChangeToRegister(TmpReg, false, false, true);
SILowerSGPRSpills.cpp 409 MI.getOperand(0).ChangeToRegister(Register(), false /*isDef*/);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
PrologEpilogInserter.cpp 1233 Op.ChangeToRegister(Reg, false /*isDef*/);
1258 MI.getDebugOffset().ChangeToRegister(0, false);
1290 MI.getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.cpp 342 MI.getOperand(FIOp).ChangeToRegister(BP, false, false, false);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 1275 MI.getOperand(FIOperandNum).ChangeToRegister(
1359 MI.getOperand(OperandBase).ChangeToRegister(StackReg, false);
1360 MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false, false, true);
1481 MI.getOperand(FIOperandNum).ChangeToRegister(BaseReg, false);

Completed in 33 milliseconds

1 2