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    Searched refs:Costs (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/PBQP/
Graph.h 68 NodeEntry(VectorPtr Costs) : Costs(std::move(Costs)) {}
94 VectorPtr Costs;
103 EdgeEntry(NodeId N1Id, NodeId N2Id, MatrixPtr Costs)
104 : Costs(std::move(Costs)) {
152 MatrixPtr Costs;
371 /// Add a node with the given costs.
372 /// @param Costs Cost vector for the new node
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
RegAllocPBQP.cpp 189 /// Set spill costs for each node in the PBQP reg-alloc graph.
195 // A minimum spill costs, so that register constraints can can be set
404 // Try looking the edge costs up in the IMatrixCache first.
483 PBQPRAGraph::RawMatrix Costs(Allowed1->size() + 1,
485 addVirtRegCoalesce(Costs, *Allowed1, *Allowed2, CBenefit);
486 G.addEdge(N1Id, N2Id, std::move(Costs));
492 PBQPRAGraph::RawMatrix Costs(G.getEdgeCosts(EId));
493 addVirtRegCoalesce(Costs, *Allowed1, *Allowed2, CBenefit);
494 G.updateEdgeCosts(EId, std::move(Costs));
901 const Vector &Costs = getNodeCosts(NId)
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SplitKit.cpp 1016 SmallVector<BlockFrequency, 8> Costs(Parent->getNumValNums());
1070 Costs[ParentVNI->id] += MBFI.getBlockFreq(ValMBB);
1091 MBFI.getBlockFreq(Dom.first) > Costs[ParentVNI->id]) {
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
RegAllocPBQP.h 210 void setup(const Vector& Costs) {
211 NumOpts = Costs.getLength() - 1;
456 // register costs first (since early nodes are the most
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenSchedule.h 168 /// registers used by the register renamer. Register costs are defined at
192 std::vector<CodeGenRegisterCost> Costs;
201 bool hasDefaultCosts() const { return Costs.empty(); }
RegisterInfoEmitter.cpp 1454 auto Costs = Reg.CostPerUse;
1455 AllRegCostPerUse.insert(AllRegCostPerUse.end(), Costs.begin(), Costs.end());
1456 if (NumRegCosts > Costs.size())
1458 NumRegCosts - Costs.size(), 0);
1465 // i.e. the costs for all registers corresponds to index 0, 1, 2, etc.
SubtargetEmitter.cpp 692 for (const CodeGenRegisterCost &RC : RF.Costs) {
715 unsigned NumCostEntries = RD.Costs.size();
749 // defined register file), and a table of register costs.
760 // file descriptors and register costs).
CodeGenSchedule.cpp 1867 CGRF.Costs.emplace_back(RegisterClasses[I], Cost, AllowMoveElim);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 2126 // Attempt to estimate the relative costs of predication versus branching.
5820 OutlinerCosts Costs(Subtarget);
5822 unsigned NumBytesToCreateFrame = Costs.FrameDefault;
5828 NumBytesToCreateFrame = Costs.FrameTailCall;
5829 SetCandidateCallInfo(MachineOutlinerTailCall, Costs.CallTailCall);
5836 NumBytesToCreateFrame = Costs.FrameThunk;
5837 SetCandidateCallInfo(MachineOutlinerThunk, Costs.CallThunk);
5857 NumBytesNoStackCalls += Costs.CallNoLRSave;
5858 C.setCallInfo(MachineOutlinerNoLRSave, Costs.CallNoLRSave);
5866 NumBytesNoStackCalls += Costs.CallRegSave
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