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Searched refs:D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_cik.c	`920 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK \| 923 (d2vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK \|`
amdgpu_vi.c	`404 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK \|`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	`2507 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x00000001L`
dce_8_0_sh_mask.h	`11025 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x1`
dce_10_0_sh_mask.h	`11409 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x1 [all...]`
dce_11_0_sh_mask.h	`11221 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x1 [all...]`
dce_11_2_sh_mask.h	`12475 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x1 [all...]`
dce_12_0_sh_mask.h	`2090 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x00000001L [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_1_0_sh_mask.h	`1640 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x00000001L [all...]`
dcn_2_0_0_sh_mask.h	`140 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x00000001L [all...]`
dcn_2_1_0_sh_mask.h	`141 #define D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK 0x00000001L [all...]`

Completed in 974 milliseconds