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    Searched refs:D4VGA_CONTROL (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_hwseq.h 210 SR(D4VGA_CONTROL), \
275 SR(D4VGA_CONTROL), \
326 SR(D4VGA_CONTROL), \
418 uint32_t D4VGA_CONTROL;
573 HWS_SF(, D4VGA_CONTROL, D4VGA_MODE_ENABLE, mask_sh),\
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer.c 516 REG_GET(D4VGA_CONTROL, D4VGA_MODE_ENABLE, &in_vga4_mode);
525 REG_WRITE(D4VGA_CONTROL, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hwseq.c 258 REG_WRITE(D4VGA_CONTROL, 0);

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