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    Searched refs:D5VGA_CONTROL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_hwseq.h 276 SR(D5VGA_CONTROL), \
327 SR(D5VGA_CONTROL), \
419 uint32_t D5VGA_CONTROL;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_hwseq.c 259 REG_WRITE(D5VGA_CONTROL, 0);

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