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Searched refs:DCCG_AUDIO_DTO0_PHASE (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_audio.h	`40 SR(DCCG_AUDIO_DTO0_PHASE),\ 57 SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\ 80 uint32_t DCCG_AUDIO_DTO0_PHASE; 98 uint8_t DCCG_AUDIO_DTO0_PHASE; 117 uint32_t DCCG_AUDIO_DTO0_PHASE;`
amdgpu_dce_audio.c	`832 REG_UPDATE(DCCG_AUDIO_DTO0_PHASE, 833 DCCG_AUDIO_DTO0_PHASE, clock_info.audio_dto_phase);`
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dce3_1_afmt.c	`162 WREG32(DCCG_AUDIO_DTO0_PHASE, dto_phase);`
radeon_dce6_afmt.c	`288 WREG32(DCCG_AUDIO_DTO0_PHASE, 24000);`
radeon_evergreen_hdmi.c	`271 WREG32(DCCG_AUDIO_DTO0_PHASE, dto_phase);`
radeon_r600_hdmi.c	`335 WREG32(DCCG_AUDIO_DTO0_PHASE, 24000 * 100);`
sid.h	`915 #define DCCG_AUDIO_DTO0_PHASE 0x05b0`
evergreend.h	`502 #define DCCG_AUDIO_DTO0_PHASE 0x05b0`
r600d.h	`955 #define DCCG_AUDIO_DTO0_PHASE 0x0514`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`919 #define DCCG_AUDIO_DTO0_PHASE 0x05b0`

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