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Searched refs:DCCG_AUDIO_DTO1_PHASE (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_audio.h	`42 SR(DCCG_AUDIO_DTO1_PHASE) 59 SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\ 82 uint32_t DCCG_AUDIO_DTO1_PHASE; 100 uint8_t DCCG_AUDIO_DTO1_PHASE; 119 uint32_t DCCG_AUDIO_DTO1_PHASE;`
amdgpu_dce_audio.c	`864 REG_UPDATE(DCCG_AUDIO_DTO1_PHASE, 865 DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase);`
/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dce3_1_afmt.c	`169 WREG32(DCCG_AUDIO_DTO1_PHASE, dto_phase);`
radeon_dce6_afmt.c	`320 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);`
radeon_evergreen_hdmi.c	`307 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);`
radeon_r600_hdmi.c	`339 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000 * 100);`
sid.h	`917 #define DCCG_AUDIO_DTO1_PHASE 0x05c0`
evergreend.h	`510 #define DCCG_AUDIO_DTO1_PHASE 0x05c0`
r600d.h	`964 #define DCCG_AUDIO_DTO1_PHASE 0x0524`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
sid.h	`921 #define DCCG_AUDIO_DTO1_PHASE 0x05c0`

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