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Searched refs:DCN20_CLK_SRC_PLL0 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_resource.c	`863 DCN20_CLK_SRC_PLL0, 1720 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] =`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c	`364 DCN20_CLK_SRC_PLL0, 3549 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] =`

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