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    Searched refs:DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE__SHIFT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_sh_mask.h	5042 #define DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE__SHIFT 0x0000000a
dce_8_0_sh_mask.h	2912 #define DCO_MEM_POWER_STATE__DPC_MEM_PWR_STATE__SHIFT 0xa

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