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Searched refs:DCR_CPC0_CR1 (Results 1 - 6 of 6) sorted by relevancy

/src/sys/arch/evbppc/obs405/
obs200_autoconf.c	`58 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);`
obs266_autoconf.c	`58 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);`
obs600_autoconf.c	`103 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);`
/src/sys/arch/evbppc/dht/
autoconf.c	`66 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);`
/src/sys/arch/evbppc/walnut/
autoconf.c	`69 mtdcr(DCR_CPC0_CR1, mfdcr(DCR_CPC0_CR1) & ~CPC0_CR1_CETE);`
/src/sys/arch/powerpc/include/ibm4xx/
dcr4xx.h	`82 #define DCR_CPC0_CR1 0x0b2 /* Chip Control Register 1 */`

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