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    Searched refs:DCR_UIC_SR (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/evbppc/sam460ex/
autoconf.c 114 mtdcr(DCR_UIC1_BASE + DCR_UIC_SR, 0x80000000);
119 mtdcr(DCR_UIC3_BASE + DCR_UIC_SR, 0x000ff000);
machdep.c 645 (unsigned int)mfdcr((base) + DCR_UIC_SR), \
  /src/sys/arch/powerpc/ibm4xx/
pic_uic.c 170 mtdcr(DCR_UIC0_BASE + DCR_UIC_SR, v);
228 mtdcr(DCR_UIC1_BASE + DCR_UIC_SR, v);
282 mtdcr(DCR_UIC2_BASE + DCR_UIC_SR, v);
338 mtdcr(DCR_UIC3_BASE + DCR_UIC_SR, v);
  /src/sys/arch/powerpc/include/ibm4xx/
dcr4xx.h 98 #define DCR_UIC_SR 0x000 /* UIC Status Register */

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