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Searched refs:DC_BE (Results 1 - 3 of 3) sorted by relevancy

/src/sys/arch/sun3/sun3/
cache.h	`48 #define DC_BE 0x1000 /* data burst enable */ 51 #define CACHE_ON (DC_WA\|DC_BE\|DC_CLR\|DC_ENABLE\|IC_BE\|IC_CLR\|IC_ENABLE) 54 #define IC_CLEAR (DC_WA\|DC_BE\|DC_ENABLE\|IC_BE\|IC_CLR\|IC_ENABLE) 55 #define DC_CLEAR (DC_WA\|DC_BE\|DC_CLR\|DC_ENABLE\|IC_BE\|IC_ENABLE)`
/src/sys/arch/m68k/include/
cpu.h	`76 #define DC_BE 0x1000 /* data burst enable */ 96 #define CACHE_ON (DC_WA\|DC_BE\|DC_CLR\|DC_ENABLE\|IC_BE\|IC_CLR\|IC_ENABLE) 99 #define IC_CLEAR (DC_WA\|DC_BE\|DC_ENABLE\|IC_BE\|IC_CLR\|IC_ENABLE) 100 #define DC_CLEAR (DC_WA\|DC_BE\|DC_CLR\|DC_ENABLE\|IC_BE\|IC_ENABLE)`
/src/sys/arch/news68k/include/
cpu.h	`60 * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE... 73 #define CACHE_BE (DC_BE\|IC_BE)`

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